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Using Ring Sync with HC-5502A and HC-5504 SLICs
Application Note January 1997 AN571.1
Introduction
The ring synchronization (sync) input pin is a TTL compatible clock input in both the HC-5502A and HC-5504 SLICs. It's purpose is to insure that the ring relay is activated or deactivated only when the instantaneous AC ring voltage, which may be as high as 150V peak, is at or near AC zero crossing. If ring sync is not used, it must be tied high to insure proper ring trip. When used, it is important to consider at which zero crossing of the AC ring voltage, positive or negative, the ring sync signal must be synchronized with. Subsequent illustrations and equations highlight this consideration. For detailed description of the ring trip sequence of events, refer to Application Note 549 by P. G. Phillips. Excerpts from the pertinent section are included below. Ring Trip Sequence The Ring Command (RC) input is taken low during ringing. This activates the ring relay driver (RD) output providing the telephone is not off-hook or the line is not in a power denial state. The ring relay connects the ring generator to the subscriber loop. The ring generator output is usually an 80VRMS, 20Hz signal. For use with the Intersil SLIC, the ring signal should not exceed 150V peak. Since the telephone ringer is AC coupled, only ring current will flow. For the HC5502A SLIC, the ring current is sunk by the ring feed amplifier output stage whereas for the HC-5504 the ring path flows directly into VB- via a set of relay contacts. The high impedance terminal RFS exists on the HC-5504 so that the low impedance RF node can be isolated from the hot end of the ring path in the battery referenced ring scheme. The AC ring current flowing in the subscriber circuit will be sensed across RB4, and will give rise to an AC voltage at the output of the longitudinal amplifier. R19 and C4 attenuate this signal before it reaches the ring trip detector to prevent false ring trip. C4 is nominally set at 0.47F but can be increased towards 1F for short lines or if several telephones are connected in parallel across the line in order to prevent false or intermittent ring trip. When the subscriber goes off-hook, a DC path is established between the output winding of the ring generator and the battery ground or VB- terminal. A DC longitudinal imbalance is established since no tip feed current is flowing through the tip feed resistors. The longitudinal amplifier output is driven negative. Once it exceeds the ring trip threshold of the ring trip detector, the logic circuitry is driven by GK to trip the ring relay establishing an off-hook condition such that SHD will become active as loop metallic current starts to flow. Figure 1 illustrates the sequence of events during ring trip with ring synchronization. Note, that owing to the 90o phase shift introduced by the low pass filter (R19, C4) the RS pulse will occur at the most negative point of the attenuated ring signal that is fed into the ring trip detector. Hence, when DC conditions are established for RTD, the AC component actually assists ring trip taking place. If ring synchronization is not used, then the RS pin should be held permanently to a logic high of 5V nominally: ring trip will occur asynchronously with respect to the ring voltage. Ring trip is guaranteed to take place within three ring cycles after the telephone going off-hook.
FIGURE 1. RING TRIP SEQUENCE
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Application Note 571 Case 1: HC-5502A Tip Injected Ringing
VLA = (IRING - ITIP) (RB4) (K) (During Ringing ITIP = 0) VLA = (IRING) (RB4) (K) IRING = (VRF - VRING)/RB4 VLA = (VRF - VRING) K
Case 2: HC-5504 Ring Injected Ringing
VLA = (IRING - ITIP) (RB4) (K) (During Ringing ITIP = 0) VLA = (IRING)(RB4) (K) IRING = (VRFS - VRING)/RB4 VLA = (VRFS - VRING) K
FIGURE 2.
FIGURE 4.
FIGURE 3.
FIGURE 5.
For Case 1, refer to Figures 2 and 3. In this situation the desired result is obtained, namely, that ring sync occurs during the negative peak of VC4. This helps achieve ring trip faster because, once a subscriber goes off-hook, a negative DC shift is observed at VC4. This shift approaches a comparator threshold in the ring trip detection circuit. If the negative peak of VC4(AC) precedes the negative going DC shift at VC4, one can achieve ring trip in a shorter time frame. Also this configuration allows ring trip to occur for long lines, in the order of 3000. At these line lengths, the DC negative shift will never reach the threshold because there is not enough DC current through the sense resistor, RB4. However, the negative peak of VC4 (AC) will cross the ring trip detector comparator threshold and ring trip will occur. Conclusion 1: For this case make sure ring sync is synchronized with the negative zero crossing of VRING as it appears on the line.
For Case 2 refer to Figures 4 and 5. Here ring sync must be synchronized with the positive zero crossing of VRING (AC) as it appears on the line so as to coincide with the negative peak of VC4 (AC), as in the previous case. One can see from Figure 5 that ring sync on the negative zero crossing would coincide with the positive peak of VC4 , inhibiting ring trip for loops greater than approximately 800. Conclusion 2: For this case make sure ring sync is synchronized with the positive zero crossing of VRING (AC.). For all other ring configurations, namely, tip injected and balanced ringing for the HC-5504, if ring sync is used, it must be synchronized with the negative zero crossing of VRING(AC).
Acknowledgment
The author wishes to thank Geoff Philliips for his contribution to this paper.
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Application Note 571
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com
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